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dc.contributor.authorHahne, Christopheren
dc.contributor.authorLumsdaine, Andrewen
dc.contributor.authorAggoun, Amaren
dc.contributor.authorVelisavljević, Vladanen
dc.date.accessioned2018-05-18T09:33:05Z
dc.date.available2018-05-18T09:33:05Z
dc.date.issued2018-03-22
dc.identifier.citationHahne C, Lumsdaine A, Aggoun A, Velisavljevic V. (2018) 'Real-time refocusing using an FPGA-based standard plenoptic camera', IEEE Transactions on Industrial Electronics, 65 (12), pp.9757-9766.en
dc.identifier.issn0278-0046
dc.identifier.doi10.1109/TIE.2018.2818644
dc.identifier.urihttp://hdl.handle.net/10547/622714
dc.description.abstractPlenoptic cameras are receiving increased attention in scientific and commercial applications because they capture the entire structure of light in a scene, enabling optical transforms (such as focusing) to be applied computationally after the fact, rather than once and for all at the time a picture is taken. In many settings, real-time inter active performance is also desired, which in turn requires significant computational power due to the large amount of data required to represent a plenoptic image. Although GPUs have been shown to provide acceptable performance for real-time plenoptic rendering, their cost and power requirements make them prohibitive for embedded uses (such as in-camera). On the other hand, the computation to accomplish plenoptic rendering is well structured, suggesting the use of specialized hardware. Accordingly, this paper presents an array of switch-driven finite impulse response filters, implemented with FPGA to accomplish high-throughput spatial-domain rendering. The proposed architecture provides a power-efficient rendering hardware design suitable for full-video applications as required in broadcasting or cinematography. A benchmark assessment of the proposed hardware implementation shows that real-time performance can readily be achieved, with a one order of magnitude performance improvement over a GPU implementation and three orders ofmagnitude performance improvement over a general-purpose CPU implementation.
dc.language.isoenen
dc.publisherIEEEen
dc.relation.urlhttps://ieeexplore.ieee.org/document/8322307/en
dc.rightsGreen - can archive pre-print and post-print or publisher's version/PDF
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectplenoptic cameraen
dc.subjectG490 Computing Science not elsewhere classifieden
dc.titleReal-time refocusing using an FPGA-based standard plenoptic cameraen
dc.typeArticleen
dc.contributor.departmentUniversity of Bedfordshireen
dc.contributor.departmentPacific Northwest National Laboratoryen
dc.identifier.journalIEEE Transactions on Industrial Electronicsen
dc.date.updated2018-05-17T13:14:25Z
dc.description.notePlease can you provide a postprint (copy of article after refereeing, but before final typesetting) for inclusion in the repository. This is needed if you wish to have the article eligible for the REF.
html.description.abstractPlenoptic cameras are receiving increased attention in scientific and commercial applications because they capture the entire structure of light in a scene, enabling optical transforms (such as focusing) to be applied computationally after the fact, rather than once and for all at the time a picture is taken. In many settings, real-time inter active performance is also desired, which in turn requires significant computational power due to the large amount of data required to represent a plenoptic image. Although GPUs have been shown to provide acceptable performance for real-time plenoptic rendering, their cost and power requirements make them prohibitive for embedded uses (such as in-camera). On the other hand, the computation to accomplish plenoptic rendering is well structured, suggesting the use of specialized hardware. Accordingly, this paper presents an array of switch-driven finite impulse response filters, implemented with FPGA to accomplish high-throughput spatial-domain rendering. The proposed architecture provides a power-efficient rendering hardware design suitable for full-video applications as required in broadcasting or cinematography. A benchmark assessment of the proposed hardware implementation shows that real-time performance can readily be achieved, with a one order of magnitude performance improvement over a GPU implementation and three orders ofmagnitude performance improvement over a general-purpose CPU implementation.


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