SpiNNaker: a multi-core System-on-Chip for massively-parallel neural net simulation
Authors
Painkras, EustacePlana, Luis A.
Garside, Jim D.
Temple, Steve
Davidson, Simon
Pepper, Jeffrey
Clark, David
Patterson, Cameron
Furber, Steve B.
Issue Date
2012
Metadata
Show full item recordAbstract
The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication. SpiNNaker is a massively-parallel computer system designed to model up to a billion spiking neurons in real time. The basic block of the machine is the SpiNNaker multicore System-on-Chip, a Globally Asynchronous Locally Synchronous (GALS) system with 18 ARM968 processor nodes residing in synchronous islands, surrounded by a light-weight, packet-switched asynchronous communications infrastructure. The MPSoC contains 100 million transistors in a 102 mm2 die, provides a peak performance of 3.96 GIPS and has a power consumption of 1W at 1.2V when all processor cores operate at nominal frequency. SpiNNaker chips were delivered in May 2011, were fully operational, and met power and performance requirements.Citation
Painkras, E., Plana, L.A., Garside, J. et al, (2012) 'SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation', IEEE Custom Integrated Circuits Conference (CICC), pp.1-4Type
Conference papers, meetings and proceedingsLanguage
enae974a485f413a2113503eed53cd6c53
10.1109/CICC.2012.6330636