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    Scalable communications for a million-core neural processing architecture

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    Authors
    Patterson, Cameron
    Garside, Jim D.
    Painkras, Eustace
    Temple, Steve
    Plana, Luis A.
    Navaridas, Javier
    Sharp, Thomas
    Furber, Steve B.
    Issue Date
    2012
    Subjects
    GALS
    HPC
    network-on-chip
    
    Metadata
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    Abstract
    The design of a new high-performance computing platform to model biological neural networks requires scalable, layered communications in both hardware and software. SpiNNaker's hardware is based upon Multi-Processor System-on-Chips (MPSoCs) with flexible, power-efficient, custom communication between processors and chips. The architecture scales from a single 18-processor chip to over 1 million processors and to simulations of billion-neuron, trillion-synapse models, with tens of trillions of neural spike-event packets conveyed each second. The communication networks and overlying protocols are key to the successful operation of the SpiNNaker architecture, designed together to maximise performance and minimise the power demands of the platform. SpiNNaker is a work in progress, having recently reached a major milestone with the delivery of the first MPSoCs. This paper presents the architectural justification, which is now supported by preliminary measured results of silicon performance, indicating that it is indeed scalable to a million-plus processor system.
    Citation
    Patterson, C.; Garside, J.; Painkras, E.; Temple, S., Plana, L., Navaridas, J., Sharp, T. and Furber, S. (2012) 'Scalable communications for a million-core neural processing architecture' 72 (11):1507-1520 Journal of Parallel and Distributed Computing
    Publisher
    Elsevier
    Journal
    Journal of Parallel and Distributed Computing
    URI
    http://hdl.handle.net/10547/279184
    DOI
    10.1016/j.jpdc.2012.01.016
    Additional Links
    http://linkinghub.elsevier.com/retrieve/pii/S0743731512000287
    Type
    Article
    Language
    en
    ISSN
    07437315
    ae974a485f413a2113503eed53cd6c53
    10.1016/j.jpdc.2012.01.016
    Scopus Count
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    Centre for Research in Distributed Technologies (CREDIT)

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