2.50
Hdl Handle:
http://hdl.handle.net/10547/313167
Title:
Embedded FIR filter design for real-time refocusing using a standard plenoptic video camera
Authors:
Hahne, Christopher; Aggoun, Amar
Abstract:
A novel and low-cost embedded hardware architecture for real-time refocusing based on a standard plenoptic camera is presented in this study. The proposed layout design synthesizes refocusing slices directly from micro images by omitting the process for the commonly used sub-aperture extraction. Therefore, intellectual property cores, containing switch controlled Finite Impulse Response (FIR) filters, are developed and applied to the Field Programmable Gate Array (FPGA) XC6SLX45 from Xilinx. Enabling the hardware design to work economically, the FIR filters are composed of stored product as well as upsampling and interpolation techniques in order to achieve an ideal relation between image resolution, delay time, power consumption and the demand of logic gates. The video output is transmitted via High-Definition Multimedia Interface (HDMI) with a resolution of 720p at a frame rate of 60 fps conforming to the HD ready standard. Examples of the synthesized refocusing slices are presented.
Affiliation:
University of Bedfordshire
Citation:
Hahne, C. and Aggoun, A. (2014) “Embedded FIR filter Design for Real-Time Refocusing Using a Standard Plenoptic Video Camera” in [IS&T/SPIE Digital Photography X], Proc. SPIE 9023, 4, San Francisco, CA, 2014.
Publisher:
SPIE - the international society for optics and photonics
Issue Date:
3-Feb-2014
URI:
http://hdl.handle.net/10547/313167
DOI:
10.1117/12.2042495
Additional Links:
http://spie.org/Publications/Proceedings/Paper/10.1117/12.2042495
Type:
Conference papers, meetings and proceedings
Language:
en_US
Description:
Copyright 2014 Society of Photo-Optical Instrumentation Engineers and IS&T—The Society for Imaging Science and Technology. One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper are prohibited.
Series/Report no.:
9023; 4
Appears in Collections:
Centre for Research in Distributed Technologies (CREDIT)

Full metadata record

DC FieldValue Language
dc.contributor.authorHahne, Christopheren
dc.contributor.authorAggoun, Amaren
dc.date.accessioned2014-02-21T11:31:36Z-
dc.date.available2014-02-21T11:31:36Z-
dc.date.issued2014-02-03-
dc.identifier.citationHahne, C. and Aggoun, A. (2014) “Embedded FIR filter Design for Real-Time Refocusing Using a Standard Plenoptic Video Camera” in [IS&T/SPIE Digital Photography X], Proc. SPIE 9023, 4, San Francisco, CA, 2014.en
dc.identifier.doi10.1117/12.2042495-
dc.identifier.urihttp://hdl.handle.net/10547/313167-
dc.descriptionCopyright 2014 Society of Photo-Optical Instrumentation Engineers and IS&T—The Society for Imaging Science and Technology. One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper are prohibited.en
dc.description.abstractA novel and low-cost embedded hardware architecture for real-time refocusing based on a standard plenoptic camera is presented in this study. The proposed layout design synthesizes refocusing slices directly from micro images by omitting the process for the commonly used sub-aperture extraction. Therefore, intellectual property cores, containing switch controlled Finite Impulse Response (FIR) filters, are developed and applied to the Field Programmable Gate Array (FPGA) XC6SLX45 from Xilinx. Enabling the hardware design to work economically, the FIR filters are composed of stored product as well as upsampling and interpolation techniques in order to achieve an ideal relation between image resolution, delay time, power consumption and the demand of logic gates. The video output is transmitted via High-Definition Multimedia Interface (HDMI) with a resolution of 720p at a frame rate of 60 fps conforming to the HD ready standard. Examples of the synthesized refocusing slices are presented.en
dc.language.isoen_USen
dc.publisherSPIE - the international society for optics and photonicsen
dc.relation.ispartofseries9023en
dc.relation.ispartofseries4en
dc.relation.urlhttp://spie.org/Publications/Proceedings/Paper/10.1117/12.2042495-
dc.rightsAn error occurred on the license name.*
dc.rights.uriAn error occurred getting the license - uri.*
dc.subjectlight fielden
dc.subjectplenoptic cameraen
dc.subjectrefocusingen
dc.subjectray tracingen
dc.subjecthardwareen
dc.subjectsignal processingen
dc.subjectFPGAen
dc.subjectFIR filteren
dc.titleEmbedded FIR filter design for real-time refocusing using a standard plenoptic video cameraen_US
dc.typeConference papers, meetings and proceedingsen
dc.contributor.departmentUniversity of Bedfordshireen
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